Shanghai Jiao Tong University;National University of Singapore
发明人:
Boxiao LIU,Yong Lian,Lei Zeng,Chun Huat Heng
申请号：
US16678960
公开号：
US20200146585A1
申请日:
2019.11.08
申请国别(地区):
US
年份:
2020
代理人:
摘要：
An electrical impedance tomography system with frequency division multiplexing based data compression comprising electrodes, a connecting line, an electrical impedance tomography chip, a universal serial bus and a computer. The present invention realizes the proposed electrical impedance tomography system by innovative application of frequency division multiplexing technology, and has the advantages of low power consumption and improved hardware overheads. The architecture of the 13-channel electrical impedance tomography chip introduced in the embodiment of the present invention, which applies the frequency division multiplexing based data compression technology, has taped out using CMOS 0.13 micrometer process； the power consumption per channel turns out to be 118 microwatts and the area is 0.87 square millimeters, verifying the effectiveness of the present invention. The present invention can also be migrated to other applications of electrical impedance tomography.
