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Logic-driven layout verification
专利权人:
Patrick D. Gibson;Fedor G. Pikus;Padmaja Susarla;Sridhar Srinivasan
发明人:
Sridhar Srinivasan,Fedor G. Pikus,Patrick D. Gibson,Padmaja Susarla
申请号:
US13017788
公开号:
US10596219B2
申请日:
2011.01.31
申请国别(地区):
US
年份:
2020
代理人:
摘要:
A check for determining the appropriateness of physical design data is provided, where the check includes both a physical component and a logical component. Based upon the logical component of the check, portions of the physical design data that correspond to the logical component are identified and selected. After the portions of the physical design data corresponding to the logical component have been selected, this physical design data can be provided to a physical design analysis tool, along with the physical component of the design check. The physical design analysis tool can then use the physical component of the design check to perform an analysis of the selected physical design data.
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