The present invention discloses a preparation method of plan-view TEM sample used in an integrated circuit analysis. The method comprises the steps of: providing a carrying slice, and fixing a chip containing a targeted structure sample and the carrying slice on a sample holder in a horizontal direction, and putting them in a process chamber of a FIB apparatus; cutting off a piece of chip structure containing a target structure sample by adopting a FIB; and welding the piece of chip structure on the flat and clean side of the carrying slice by using a nano-manipulator; after being taken out from the process chamber of the FIB apparatus, the carrying slice welded with the chip structure is adjusted to vertical direction, and is put in the process chamber of the FIB apparatus again; transferring and welding the chip structure on the TEM copper grid by using the nano-manipulator; and removing one layer or multiple layers above the preset target layer from the surface layer of the chip by using the FIB to obtain
