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電子内視鏡用プロセッサ、電子内視鏡システムおよび画像処理装置
专利权人:
HOYA株式会社
发明人:
小松 雅弘
申请号:
JP2013093110
公开号:
JP6189081B2
申请日:
2013.04.25
申请国别(地区):
JP
年份:
2017
代理人:
摘要:
PROBLEM TO BE SOLVED: To provide an electronic endoscope processor and an electronic endoscope system which are capable of properly performing phase comparison with an LVDS signal with data multiplexed in the clock and controlling a PLL to absorb the jitter caused by the LVDS signal.SOLUTION: An electronic endoscope processor comprises an interface for receiving an LVDS signal from an electronic endoscope. The interface comprises: a PLL for performing phase comparison with the LVDS signal, and locking to the LVDS signal a PLL control unit for controlling the PLL and a parallel conversion unit for converting the LVDS signal into a parallel signal. In addition, the PLL generates a window signal on the basis of the LVDS signal. When the LVDS signal has imaging data multiplexed in the clock, the PLL control unit controls the PLL such that phase comparison with the LVDS signal is performed by using the window signal.
来源网站:
中国工程科技知识中心
来源网址:
http://www.ckcest.cn/home/

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